Sridhar Rajagopal

Data-parallel Digital Signal Processors: Algorithm Mapping, Architecture Scaling and Workload Adaptation Sridhar Rajagopal

Emerging applications such as high definition television (HDTV), streaming video, image processing in embedded applications and signal processing in high-speed wireless communications are driving a need for high performance digital signal processors (DSPs) with real-time processing. This class of applications demonstrates significant data parallelism, finite precision,need for power-efficiency and the need for 100's of arithmetic units in the DSP to meet real-time requirements. Data-parallel DSPs meet these requirements by employing clusters of functional units, enabling 100's of computations every clock cycle. These DSPs exploit instruction level parallelism and subword parallelism within clusters, similar to atraditional VLIW (Very Long Instruction Word) DSP, and exploit data parallelism across clusters, similar to vector processors.